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output macrocell

Programmable Array Logic — The term Programmable Array Logic (PAL) is used to describe a family of programmable logic device semiconductors used to implement logic functions in digital circuits introduced by Monolithic Memories, Inc. (MMI) in March 1978.cite journal |… … Wikipedia
Complex programmable logic device — An Altera MAX 7000 series CPLD with 2500 gates. A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The building block of a CPLD is the… … Wikipedia
Programmable logic device — A programmable logic device or PLD is an electronic component used to build reconfigurable digital circuits. Unlike a logic gate, which has a fixed function, a PLD has an undefined function at the time of manufacture. Before the PLD can be used… … Wikipedia
Joint Test Action Group — (JTAG) is the usual name used for the IEEE 1149.1 standard entitled Standard Test Access Port and Boundary Scan Architecture for test access ports used for testing printed circuit boards using boundary scan.JTAG was an industry group formed in… … Wikipedia
OLMC — abbr. Output Logic Macro Cell (GAL) comp. abbr. Output Logic Macrocell … United dictionary of abbreviations and acronyms